COMPUTER PROGRAMS INSTRUCTION

Brand Owner (click to sort) Address Description
BARTENDER SEAGULL SCIENTIFIC 15325 SE 30TH PLACE SUITE 100 BELLEVUE WA 98007 computer programs [ and instruction manuals ] for use in printing labels;BAR TENDER;
COBOL WORKBENCH MICRO FOCUS IP DEVELOPMENT LIMITED The Lawn 22-30 Old Bath Road Newbury, Berkshire RG141QN United Kingdom computer programs [ and instruction manuals, supplied as a unit, ] for use in the field of computer programming;COBOL;
ELECTRIC CRAYON BRIAN A. RICE, INC. P.O. BOX 1088 WESTMONT IL 60559 COMPUTER PROGRAMS [ AND INSTRUCTION MANUALS SOLD AS A UNIT ] * FOR HOME ENTERTAINMENT AND HOME EDUCATION *;IN THE STATEMENT, COLUMN 1, LINES 6 AND 7, AND INSTRUCTION MANUALS SOLD AS A UNIT IS DELETED, AND FOR HOME ENTERTAINMENT AND HOME EDUCATION IS INSERTED.;
OBJECTMAKER WORKIVA INC. 2900 University Blvd. Ames IA 50010 COMPUTER PROGRAMS [ AND INSTRUCTION MANUALS DISTRIBUTED THEREWITH, ] FOR DATABASE MANAGEMENT;OBJECT MAKER;
WESTLAW West Publishing Corporation Thomson Reuters 610 Opperman Drive Eagan MN 55123 COMPUTER PROGRAMS [ AND INSTRUCTION MANUALS ALL SOLD AS A UNIT ] FOR USE IN THE FIELD OF LEGAL RESEARCH;WEST LAW;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. A method for adaptive runtime reconfiguration of a co-processor instruction set, in a computer system with at least a main processor communicatively connected to at least one reconfigurable co-processor, includes the steps of configuring the co-processor to implement an instruction set comprising one or more co-processor instructions, issuing a co-processor instruction to the co-processor, and determining whether the instruction is implemented in the co-processor. For an instruction not implemented in the co-processor instruction set, raising a stall signal to delay the main processor, determining whether there is enough space in the co-processor for the non-implemented instruction, and if there is enough space for said instruction, reconfiguring the instruction set of the co-processor by adding the non-implemented instruction to the co-processor instruction set. The stall signal is cleared and the instruction is executed.