COMPUTER PROGRAMS DESIGN AUTOMATION

Brand Owner (click to sort) Address Description
ACEO TECHNOLOGY ACEO TECHNOLOGY, INC. 48521 Warm Springs Boulevard, Suite 314 Fremont CA 94539 computer programs for design automation in the electronic engineer field for semiconductor and electronic systems design;TECHNOLOGY;The mark is lined for the colors red and blue.;
ATRANS ACEO TECHNOLOGY, INC. 48521 Warm Springs Boulevard, Suite 314 Fremont CA 94539 computer programs for design automation in the electronic engineering field for semiconductor and electronic systems design;
GATRAN ACEO TECHNOLOGY, INC. 48521 Warm Springs Boulevard, Suite 314 Fremont CA 94539 computer programs for design automation in the electronic engineering field for semiconductor and electronic systems design;
SOFTWIRE ACEO TECHNOLOGY, INC. 48521 Warm Springs Boulevard, Suite 314 Fremont CA 94539 computer programs for design automation in the electronic engineering field for semiconductor and electronic systems design;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. Described herein are methods and systems for secure exchange of information related to electronic design automation. Information deemed sensitive and otherwise worthy of protection may be secured by methods such as encryption, obfuscation and other security measures. The secured information may be provided to an electronic design automation tool for processing without revealing at least some of the secured information. For instance, rule files related to integrated circuit manufacturability may be selectively annotated to indicate portions thereof deserving of protection. An encryption tool may be used to secure the information so indicated and generate a file comprising secured information related to electronic design automation. An electronic design automation tool may then unlock and use the secured information without revealing the same. For instance, the tool may be a physical verification tool capable of verifying whether any of the one or more integrated circuit layouts may violate one or more of the secured rules. An error report may be generated without revealing the secured rules.