CONCERT PROMOTION SERVICES

Brand Owner (click to sort) Address Description
AMOR A LA MÚSICA Univision Communications Inc. 605 Third Avenue, 12th Floor New York NY 10158 concert promotion services;The English translation of AMOR A LA MÚSICA is LOVE FOR MUSIC.;MUSICA;
AMOR A LA MÚSICA Univision Communications Inc. 605 Third Avenue, 12th Floor New York NY 10158 concert promotion services;Color is not claimed as a feature of the mark.;The English translation ofAMOR A LA MÚSICA is LOVE FOR MUSIC.;MUSICA;
BARACK ON THE ROCKS Stacy, Hollis 9400 W. 10th Ave. Lakewood CO 80215 Concert promotion services;
DF DAVID FOREST COMPANY, LTD., THE 7060 HOLLYWOOD BLVD. LOS ANGELES CA 90028 CONCERT PROMOTION SERVICES;THE DRAWING IS LINED FOR THE COLORS BLUE, ORANGE, PURPLE AND GREEN AND COLOR IS CLAIMED AS PART OF THE MARK.;
DF DAVID FOREST COMPANY, LTD., THE 7060 HOLLYWOOD BLVD. LOS ANGELES CA 90028 CONCERT PROMOTION SERVICES;THE DRAWING IS LINED FOR THE COLOR BROWN AND COLOR IS CLAIMED AS PART OF THE MARK.;
SPEED OF SOUND SMITH, DANNY A. 1935 Hilltop Road Rock Hill SC 29732 concert promotion services;
THE CRADLE Cradle Partnership, The 7 Sandprint Court The Woodlands TX 77381 concert promotion services, namely, promoting and managing the concert performances of others, specializing in music of the Louisiana/Texas Gulf Coast region of the United States;
 

Where the owner name is not linked, that owner no longer owns the brand

   
Technical Examples
  1. A multiprocessor data processing system includes a plurality of processors coupled to an interconnect and to a global promotion facility containing at least one promotion bit field. A first processor executes a high speed instruction sequence including a load-type instruction to acquire a promotion bit field within the global promotion facility exclusive of at least a second processor. The request may be made visible to all processors coupled to the interconnect. In response to execution of the load-type instruction, a register of the first processor receives a register bit field indicating whether or not the promotion bit field was acquired by execution of the load-type instruction. While the first processor holds the promotion bit field exclusive of the second processor, the second processor is permitted to initiate a request on the interconnect. Advantageously, promotion bit fields are handled separately from data, and the communication of promotion bit fields does not entail the movement of data cache lines.