ENGINEERING DESIGN SERVICES FOR

Brand Owner (click to sort) Address Description
CONTRAL BIOPROCESS ENGINEERING, INC. P.O. BOX 5936 WILMINGTON DE 198080936 ENGINEERING AND DESIGN SERVICES FOR WASTE TREATMENT FACILITIES;
DRAVO VAN HOUTEN DRAVO CORPORATION 1 OLIVER PLAZA, WOOD ST. PITTSBURGH PA 15222 ENGINEERING AND DESIGN SERVICES FOR PORTS, HARBORS AND RELATED FACILITIES;
ENVIROQUIP Enviroquip, Inc. 2404 Rutland Drive, Suite 200 Austin TX 78758 Engineering and Design Services for Water and Waste Water Equipment and Processes;
FLEXIVOL Flexivol, Inc. Suite 101 4550 Post Oak Place Dr. Houston TX 77027 Engineering and Design Services for the Design of Natural Gas Liquids Plants;
MODULE-MATION RUSSELL T. GILMAN, INC. 624 BEECH ST. GRAFTON WI ENGINEERING AND DESIGN SERVICES FOR BUILDING SPECIAL MACHINES WITH MACHINE MODULES;
MOSS CBS ENGINEERING, INC. SUITE 500 1990 POST OAK BLVD., HOUSTON TX 770563846 ENGINEERING DESIGN SERVICES FOR THE DESIGN OF OFFSHORE STRUCTURES, SUCH AS OFFSHORE PLATFORMS USED FOR THE PRODUCTION OF HYDROCARBONS;
UTA KIM, YONG K. 950 N. Glebe Road Arlington VA 22203 ENGINEERING AND DESIGN SERVICES FOR DATA PROCESSING SYSTEMS;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. A method of implementing an engineering change order includes steps of: (a) receiving as input an integrated circuit design; (b) receiving as input an engineering change order to the integrated circuit design; (c) creating at least one window in the integrated circuit design that encloses a change to the integrated circuit design introduced by the engineering change order wherein the window is bounded by coordinates that define an area that is less than an entire area of the integrated circuit design; (d) performing a routing of the integrated circuit design that excludes routing of any net that is not enclosed by the window; (e) replacing an area in a copy of the integrated circuit design that is bounded by the coordinates of the window with results of the incremental routing to generate a revised integrated circuit design; and (f) generating as output the revised integrated circuit design.