INSTRUCTION SET ARCHITECTURE MICROPROCESSORS

Brand	Owner	Address	Description
UBICOM64	Ubicom, Inc.	195 Baypointe Parkway San Jose CA 95134	instruction set architecture microprocessors; computer hardware and computer peripherals; computer software for use in automatic identification and processing of media streams; computer operating software embedded in internet processors; computer software embedded in internet processors for use in implementing communications networking, for use in controlling input/output drivers, and for use in connecting electronic devices to the internet; computer software for use in implementing communications networking and internet connectivity functions; computer software for use in implementing hardware functions; Integrated circuits, microprocessors, micro controllers, circuit boards and modules for use in executing software modules;UBICOM 64;
	Where the owner name is not linked, that owner no longer owns the brand

Technical Examples

A method for operating a processor having an architecture of a larger bitlength with a program comprising instructions compiled to produce instruction results of at least one smaller bitlength having the steps of detecting when in program order a first smaller bitlength instruction is to be dispatched which does not have a target register address as one of its sources, and adding a so_extract_instruction into an instruction stream before the smaller bitlength instruction. The extract instruction includes the steps of dispatching the extract instruction together with the following smaller bitlength instruction from an instruction queue into a Reservation Station, issuing the extract instruction to an Instruction Execution Unit (IEU) as soon as all source operand data is available and an IEU is available according to respective issue scheme, executing the extract instruction by an available IEU, setting an indication that the result of the instruction needs to be written into the result field of the instruction following the extract instruction, and writing the extract instruction result into the result field of the first instruction, and into all fields of operands being dependent of the first instruction.