INTEGRATED CIRCUITS CHIPS

Brand Owner (click to sort) Address Description
DRBLADE INFINEON TECHNOLOGIES AUSTRIA AG Siemensstrasse 2 Villach 9500 Austria Integrated circuits chips; microprocessors; semiconductor power elements; semiconductor devices; semiconductor chips; semiconductor modules; semiconductor substrates; semiconductor inverters; semiconductor drivers; semi-conductor sensors; semiconductor transistors; electric and electronic circuits; microcontrollers; housings and modules for integrated circuits; software for controlling and regulating electronic components for power supply;DR BLADE;
XWAY LANTIQ DEUTSCHLAND GMBH Lilienthalstrasse 15 85579 Neubiberg Germany integrated circuits chips; data processors; semiconductors; microprocessors [ ; portable telephones; telephones; operating software, namely, firmware for telecommunication to the extent provided for the purpose of operation of the aforementioned goods ];X WAY;[ Consultancy in the field of telecommunication technology, only concerning the field of chips for intergrated circuits, data processing devices, semiconductors, microprocessors, mobile phones and telephones; design of operating software, namely, firmware for microprocessors and telecommunication; research and development of electronic products for others ];
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. An integrated services digital network private branch exchange, which is capable of automatically choosing a synchronization clock source. The integrated services digital network private branch exchange comprises a plurality of trunk chips, a plurality of subscribe chips, and a plurality of priority selection circuits. Wherein, the trunk chips connect to the network terminal via the trunk interface, and then connect to the central office via the network terminal to receive the frame synchronization clock output signal and the data clock output signal. Whereas, the subscribe chips connect to the terminal equipment via the subscribe interface. The priority selection circuits that are connected to each other in a daisy chain circuit manner are connected to the trunk chips to send out the frame synchronization clock output signal and the data clock output signal.