SPEED STORE COM

Brand Owner (click to sort) Address Description
SPEEDSTORE.COM Speed Channel, Inc. 9711 Southern Pine Boulvard Charlotte NC 28273 SPEED STORE COM;Television shop at home services featuring automotive merchandise, namely, specialty equipment for automobiles, after-market auto parts, automobile cleaners, automobile oils and lubricants, automotive collectibles, automotive-related apparel, sanctioned automotive merchandise, automobiles and automobile accessories;
SPEEDSTORE.COM Speedvision Network Two Stamford Plaza 281 Tresser Boulevard Stamford CT 06901 SPEED STORE COM;computerized online ordering services featuring automotive merchandise, namely, specialty equipment for automobiles, after-market auto parts, automobile cleaners, automobile oils and lubricants, automotive collectibles, automotive-related apparel, sanctioned automotive merchandise, automobiles and automobile accessories;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. The present invention relates to the field of (micro)computer design and architecture, and in particular to microarchitecture associated with moving data values between a (micro)processor and memory components. Particularly, the present invention relates to a computer system with an processor architecture in which register addresses are generated with more than one execution channel controlled by one central processing unit with at least one load/store unit for loading and storing data objects, and at least one cache memory associated to the processor holding data objects accessed by the processor, wherein said processor's load/store unit contains a high speed memory directly interfacing said load/store unit to the cache and directly accessible by the cache memory for implementing scatter and gather operations. The present invention improves the performance of architectures with dual ported microprocessor implementations comprising two execution pipelines capable of two load/store data transactions per cycle. By including a high speed memory inside the load/store unit, the processor is directly interfaced from its load/store units to the caches and efficiency gains are achieved by reusing the data information already present in the high speed memory structure of the load/store unit.