SYSTEM DESIGN

Brand Owner (click to sort) Address Description
ASICCAD LASARRAY S.A. Gottstattstrasse 24 CH-2504 Biel Switzerland system for the design and manufacture of integrated circuits and the transfer and storage of data, graphics, computer programs and information, consisting essentially of a compiler workstation containing a microcomputer and parts thereof; and computer software for use with the foregoing system;
ASICFAB LASARRAY S.A. Gottstattstrasse 24 CH-2504 Biel Switzerland system for the design and manufacture of integrated circuits and the transfer and storage of data, graphics, computer programs and information, consisting essentially of laser pattern generator, mask aligner, housing modules containing chip processing apparatus, chip testing, assembling and packaging apparatus, cleanroom, service module, compiler workstation, airconditioning, heating, humidity control, filtration and vacuum apparatus; computer hardware; and parts thereof for the aforementioned goods; and computer software for use with the foregoing system;asic-fab;
FLOPRO TACO, INC. 1160 Cranston Street Cranston RI 02920 educational services in the nature of providing training to tradesman and building contractors in the fields of system design, installation and sales of hydronic systems and components;The mark consists of the word FLOPRO with a impeller design in place of the O in FLO.;FLO PRO; FLOW PRO;Color is not claimed as a feature of the mark.;
INTEGRATED HEALTHCARE SOLUTIONS Integrated Healthcare Solutions, Inc. 18011 Mitchell South Irvine CA 92614 system design, integration and implementation services for the purpose of creating computer based patient records;
TESTCAPTURE Harris Corporation 1025 West NASA Blvd. Melbourne FL 32919 system for the design and simulation of test equipment hardware and software;TEST CAPTURE;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes generating a first design for the system that includes a first netlist describing a first logical design, and placement and routing of the first logical design. A second design for the system is generated that includes a second netlist describing a second logical design. Changes made to the first design in the second design are identified. Placement is performed on the changes made to the first design on the second design.