WAFER LEVEL SINGLE WAFER TECHNOLOGY

Brand Owner (click to sort) Address Description
A-QFN Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; semiconductor processing, namely, treatment of semiconductor devices;Semiconductor device, Product featuring semiconductor package, namely, computer hardware in the nature of wireless access point devices, wafer level package comprising silicon wafers, structured semiconductor wafers;Design for others of semiconductor packages, consulting services in the field of semiconductor electro-mechanical engineering;
A-WLP Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; Semiconductor processing, namely, treatment of semiconductor devices;Semiconductor devices; Product featuring semiconductor package, namely, computer hardware in the nature of wireless access point devices; Wafer level package comprising silicon wafers, structured semiconductor wafers;Design for others of semiconductor packages; Consulting service in the field of Semiconductor Electro-Mechanical Engineering;
AQFN Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; semiconductor processing, namely, treatment of semiconductor devices;Semiconductor device, Product featuring semiconductor package, namely, computer hardware in the nature of wireless access point devices; wafer level package comprising silicon wafers, structured semiconductor wafers;Design for others of semiconductor packages, consulting services in the field of semiconductor electro-mechanical engineering;
AWLP Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; Semiconductor processing, namely, treatment of semiconductor devices;Semiconductor devices; Product featuring semiconductor package, namely, computer hardware in the nature of wireless access point devices; Wafer level package comprising silicon wafers, structured semiconductor wafers;Design for others of semiconductor packages; Consulting service in the field of Semiconductor Electro-Mechanical Engineering;
DL Dawning Leading Technology Inc. No.118, Jhonghua Rd., Jhunan Township Miaoli County Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; manufacturing services for others in the nature of semiconductor packaging processing; semiconductor wafer-level processing; manufacturing services for others in the nature of integrated circuit packaging processing; manufacture of semiconductors, semiconductor wafers and integrated circuits for others; manufacture of integrated circuit boards and wafers to the order and specification of others; etching of semiconductor wafers; etching of integrated circuits;The mark consists of a red, stylized letter D that contains a stylized letter L. The color white is used to indicate background or transparent portions and is not part of the mark.;DAWNING LEADING;The color(s) red is/are claimed as a feature of the mark.;
DL-TEK Dawning Leading Technology Inc. No.118, Jhonghua Rd., Jhunan Township Miaoli County Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; manufacturing services for others in the nature of semiconductor packaging processing; semiconductor wafer-level processing; manufacturing services for others in the nature of integrated circuit packaging processing; manufacture of semiconductors, semiconductor wafers and integrated circuits for others; manufacture of integrated circuit boards and wafers to the order and specification of others; etching of semiconductor wafers; etching of integrated circuits;The mark consists of the term DL-TEK in stylized lettering.;DAWNING LEADING TECHNOLOGY;Color is not claimed as a feature of the mark.;
DLTEK Dawning Leading Technology Inc. No.118, Jhonghua Rd., Jhunan Township Miaoli County Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; manufacturing services for others in the nature of semiconductor packaging processing; semiconductor wafer-level processing; manufacturing services for others in the nature of integrated circuit packaging processing; manufacture of semiconductors, semiconductor wafers and integrated circuits for others; manufacture of integrated circuit boards and wafers to the order and specification of others; etching of semiconductor wafers; etching of integrated circuits;The mark consists of a red, stylized letter D that contains a stylized letter L with both letters situated directly to the left of the term tek in grey, stylized lettering. The color white is used to indicate background or transparent portions and is not part of the mark.;DAWNING LEADING TECHNOLOGY;The color(s) red and grey is/are claimed as a feature of the mark.;TECH;
ISIP Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; semiconductor processing, namely, treatment of semiconductor devices;Semiconductor device, Product featuring semiconductor package, namely, computer hardware in the nature of wireless access point devices; wafer level package comprising silicon wafers, structured semiconductor wafers;Design for others of semiconductor packages, consulting services in the field of semiconductor electro-mechanical engineering;
IWLP Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; semiconductor processing, namely, treatment of semiconductor devices;Semiconductor device, Product featuring semiconductor package, namely, computer hardware in the nature of wireless access point devices; wafer level package comprising silicon wafers, structured semiconductor wafers;Design for others of semiconductor packages, consulting services in the field of semiconductor electro-mechanical engineering;
MAPPOP Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Wafer level and single-wafer technology processing, namely, treatment of semiconductor wafers; Semiconductor processing, namely, treatment of semiconductor devices;Semiconductor devices; Product featuring semiconductor package, namely, computer hardware in the nature of wireless access point devices; Wafer level package comprising silicon wafers, structured semiconductor wafers;MAP POP;Design for others of semiconductor packages; Consulting service in the field of Semiconductor Electro-Mechanical Engineering;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. When an SOI wafer is produced by using a bond wafer made of silicon single crystal to form an SOI layer and a base wafer made of silicon single crystal to be a support substrate, one silicon wafer selected from a group consisting of an epitaxial wafer, an FZ wafer, a nitrogen doped wafer, a hydrogen annealed wafer, an intrinsic gettering wafer, a nitrogen doped and annealed wafer, and an entire N-region wafer is used as the bond wafer. Thereby, even where a thin insulator film or a thin SOI layer is formed in the SOI wafer, COPs are hardly detected in inspection of the SOI layer after the SOI wafer was completed, and a high quality SOI wafer is provided.