ETCHING SEMICONDUCTOR WAFERS

Brand Owner (click to sort) Address Description
A-S3 Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Etching of semiconductor wafers; etching of integrated circuits; manufacture of semiconductors, integrated circuits, integrated circuit boards and structured semi-conductor wafers to the order and specification of others, semiconductor packaging processing to the order and specification of others; semiconductor wafer processing to the order and specification of others; wafer foundry, namely, integrated circuit foundry to the order and specification of others; integrated circuit packaging processing to the order and specification of others;A-S THREE; ADVANCED SEMICONDUCTOR THREE;Research and development for others of semiconductors; semiconductor packaging design; integrated circuit design for others; quality evaluation for others of semiconductors and related products; testing of semiconductors and related products; providing quality assurance in the field of semiconductors and related products;
A-S3 Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Etching of semiconductor wafers; etching of integrated circuits; manufacture of semiconductors, integrated circuits, integrated circuit boards and structured semi-conductor wafers to the order and specification of others; Semiconductor packaging processing to the order and specification of others in the nature of manufacturing services for others; Wafer foundry, namely, integrated circuit foundry to the order and specification of others; Integrated circuit packaging processing to the order and specification of others in the nature of manufacturing services for others;The mark consists of the letters a and S where there is a dash between the letters and a superscripted number 3 after the S.;ADVANCED SEMICONDUCTOR THREE;Color is not claimed as a feature of the mark.;Research and development for others of semiconductors; semiconductor packaging design; integrated circuit design for others; quality evaluation for others of semiconductors and related products; testing of semiconductors and related products; providing quality assurance in the field of semiconductors and related products;
A-TIV Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Etching of semiconductor wafers; Etching of integrated circuits; Manufacturing services for others in the field of semiconductors by wafer-level processing; Manufacturing services for others in the field of semiconductors by using wafer fabricating equipment; Custom manufacturing of semiconductor substrates; Custom manufacture semiconductor devices using substrate fabricating equipment; Manufacturing of semiconductor substrates, semiconductors, integrated circuits, integrated circuit boards, and wafers in accordance with customer specifications;Packaging articles to the order and specification of others, namely, packaging semiconductor chips and integrated circuits;Research and development for others of semiconductor related products and technology; Semiconductor packaging design; Integrated circuit design for others; Design for others of semiconductor substrates carrying integrated circuit; Testing for of semiconductors and related products; Quality management services, namely, quality evaluation and analysis, quality assurance, and quality control, in the field of semiconductors and related products; Providing quality assurance services in the field of semiconductors and related products;
AMAPPOP Advanced Semiconductor Engineering, Inc. 26, Chin 3rd Road Nantze Export Processing Zone Nantze Kaohsiung 811 Taiwan Etching of semiconductor wafers; etching of integrated circuits; manufacture of semiconductors, integrated circuits, integrated circuit boards and structured semi-conductor wafers to the order and specification of others, semiconductor packaging processing to the order and specification of others; semiconductor wafer processing to the order and specification of others; wafer foundry, namely, integrated circuit foundry to the order and specification of others; integrated circuit packaging processing to the order and specification of others;Research and development for others of semiconductors; semiconductor packaging design; integrated circuit design for others; quality evaluation for others of semiconductors and related products; testing of semiconductors and related products; providing quality assurance in the field of semiconductors and related products;
REBIRTH INGENTEC CORPORATION NO.58 LN. 462, GONGYI RD., ZHUNAN TOWNSHIP MIAOLI COUNTY 350 Taiwan ETCHING OF SEMICONDUCTOR WAFERS AND INTEGRATED CIRCUITS; ASSEMBLY OF INTEGRATED CIRCUITS FOR OTHERS; PROCESSING OF SEMICONDUCTOR WAFERS;The mark consists of the stylized word REBIRTH with the dot over the I replaced by a pair of adjacent square contours with three vertically displaced and horizontal bars extending across the pair of adjacent square contours.;Color is not claimed as a feature of the mark.;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. Cassettes for holding thin semiconductor wafers for safe handling are provided, along with an improved methodology for reducing the thickness of semiconductor wafers. Embodiments include a cassette for holding thin semiconductor wafers, having a plurality of sets of center and edge supports, the sets being spaced from each other a distance greater than a sag amount of the wafers. The thin wafers are supported in a predetermined reference plane, so that tools such as robots or automatic handlers can be programmed to pick them up without damaging them. In another embodiment, a double into single pitch wafer cassette is provided having a wafer entrance section with spacing twice as large between sets of edge supports as a conventional cassette, to accommodate the sag/warp of the thin wafers, and a "flattening section" which guides and flattens the wafers between opposing edge supports as they are pushed into the cassette, such that the wafers are held substantially planar. Because the wafers are held substantially planar, they can be safely removed from the cassette by automatic tools. A methodology is also provided for reducing the thickness of a semiconductor wafer, comprising grinding the back side of the wafer to reduce its initial thickness to an intermediate thickness, and plasma etching the back side of the wafer to reduce the intermediate thickness to a final thickness. The two-step grinding/etching process is faster and less expensive than conventional multi-step grinding/polishing processes, because it requires less steps, each step is accomplished relatively quickly, and it employs standard grinding and etching equipment, rather than expensive dedicated equipment.